16555D 68-Channel 110 MHz State/500 MHz Timing Logic Analyzer Module w/2M of acquisition memory

16555D Performance Characteristics
Form Factor	Module (proprietary interface/bus)
Number of Channels	68 ch
Maximum Conventional Timing Rate	250 MHz
Maximum Conventiona Timing Rate(half ch)	500 MHz
Memory Depth/Channel-Normal	2 MB
Memory/Channel Half-Channel Mode	4 MB
Channel to Channel Delay	2 ns
Minimum Recognizable Glitch Width	3.5 ns
Maximum State Analysis Rate	110 MHz
Setup/Hold Time	3.5 ns
Maximum Trigger Sequence Levels	12 Levels
Maximum Trigger Sequencing Rate	125 MHz
No of Pattern Recognizers	8 QTY
No of Range Recognizers	2 QTY
No of Counter Timers	2 QTY
Input Impedance	100 kOhm
Input Capacitance	8 pF

The 16555D 110 MHz state and 500 MHz timing analysis module offers industry standard state and timing analysis features at an affordable price. With this module, there is no need to connect special probes to view timing activity. Set up your analyzer to perform simultaneous, fully time-correlated state analysis on some channels and timing analysis on the rest.

特性

Both basic and complex state and timing macros are available in the trigger macro library. Macros can be combined to create custom trigger setups.
Each trigger macro displays a graphic of the measurement and a sentence-like structure to make setting the trigger easy. Set up your trigger in terms of the measurement you want rather than the trigger functions in the logic analyzer.
Families of trigger macros make it easy to pick out just the trigger macro you need, and avoid the hassle of wading through a long list of triggers to find the one you want.

16555D 68-Channel 110 MHz State/500 MHz Timing Logic Analyzer Module w/2M of acquisition memory

16555D Performance Characteristics

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